查看“ETZPC internal peripheral”的源代码

==Article purpose==
The purpose of this article is to:
* briefly introduce the ETZPC peripheral and its main features
* indicate the level of security supported by this hardware block
* explain how it can be allocated to the three runtime contexts and linked to the corresponding software components
* explain, when necessary, how to configure the ETZPC peripheral.

==Peripheral overview==
The ETZPC peripheral is used to configure TrustZone security in a SoC having bus masters and slaves with programmable-security attributes (securable resources) such as:
* on-chip RAM/ROM with programmable secure region size
* AHB and APB peripherals to be made secure
* AHB masters to be granted secure rights
The ETZPC peripheral also allows peripheral isolation. With MCU isolation, some peripherals can be assigned to Cortex-M4 context execution only. Those peripherals will not be accessible for Cortex-A7 contexts (secure and non-secure).

===Features===
Refer to the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to see which features are implemented.

===Security support===
The ETZPC is a '''secure''' peripheral.

==Peripheral usage and associated software==
===Boot time===
The ETZPC is configured at boot time to setup the platform security.

===Runtime===

====Overview====
The ETZPC is a system peripheral and is controlled by the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 secure.

====Software frameworks====
{{:Internal_peripherals_software_table_template}}
 | Security
 | [[ETZPC internal peripheral|ETZPC]]
 | [[TF-A_overview#BL32|TF-A(BL32)]] or [[OP-TEE_overview|OP-TEE ETZPC driver]] Read/Write access
 | [[U-Boot_overview|U-Boot]]<br> Read only access
 | [[Resource_manager_for_coprocessing|Resource Manager Utility]] Read only access
 | Configuration made by A7 secure.<br>[[U-Boot_overview|U-Boot]] updates the Linux [[Device_tree|device tree]].
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in a secure context.

This configuration is done in [[TF-A_overview#BL32|TF-A(BL32)]] or [[OP-TEE_overview|OP-TEE]], through device tree (see [[ETZPC device tree configuration]]).

====Peripheral assignment====
{{:Internal_peripherals_assignment_table_template}}
<onlyinclude>
 | rowspan="1" | Security
 | rowspan="1" | [[ETZPC internal peripheral|ETZPC]]
 | ETZPC
 | <span title="system peripheral" style="font-size:21px">✓</span>
 | <span title="system peripheral" style="font-size:21px">✓</span>
 | <span title="system peripheral" style="font-size:21px">✓</span>
 | 
 |-
</onlyinclude>
 |}

==How to go further==
The ETZPC is an STMicroelectronics extension of the Arm<sup>&reg;</sup> peripheral: TrustZone Protection Controller<ref>http://infocenter.arm.com/help/topic/com.arm.doc.dto0015a/DTO0015_primecell_infrastructure_amba3_tzpc_bp147_to.pdf</ref>

==References==
<references/>

<noinclude>
{{ArticleBasedOnModel| Internal peripheral article model}}
[[Category:Security peripherals]]
</noinclude>