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QUADSPI internal peripheral
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==Article purpose== The purpose of this article is to * briefly introduce the QUADSPI peripheral and its main features * indicate the level of security supported by this hardware block * explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components * explain, when needed, how to configure the QUADSPI peripheral. ==Peripheral overview== The Quad-SPI interface ('''QUADSPI''' peripheral) is used to interface the processor with serial NOR Flash and serial NAND Flash memories. <br /> It supports: * Single, dual or quad SPI Flash memories * A dual-flash mode, allowing to agregate two Flash memories into a virtual single one * Dual data rate and memory-mapped modes. ===Features=== Refer to [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to know which features are really implemented. ===Security support=== QUADSPI is '''non secure''' peripheral. ==Using the peripheral - associated software== ===Boot time=== QUADSPI instance is boot device that support serial boot for Flash programming with [[STM32CubeProgrammer]]. ===Runtime=== ====Overview==== The QUADSPI instances can be allocated to: * the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 non-secure core to be controlled in Linux<sup>®</sup> by the [[MTD overview|MTD]] framework or * the Arm<sup>®</sup> Cortex<sup>®</sup>-M4 to be controlled in STM32Cube MPU Package by [[STM32CubeMP1 architecture|QUADSPI HAL driver]] Chapter [[#Peripheral assignment]] describes which peripheral instances can be assigned to which context. ====Software frameworks==== {{:Internal_peripherals_software_table_template}} | Mass storage | [[QUADSPI internal peripheral|QUADSPI]] | | [[MTD overview|Linux MTD framework]] | [[STM32CubeMP1 architecture|STM32Cube QUADSPI driver]] | |- |} ====Peripheral configuration==== The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article. For Linux kernel configuration, please refer to [[QUADSPI device tree configuration]]. ====Peripheral assignment==== {{:Internal_peripherals_assignment_table_template}} <onlyinclude> | rowspan="1" | Mass storage | rowspan="1" | [[QUADSPI internal peripheral|QUADSPI]] | QUADSPI | | <span title="assignable peripheral" style="font-size:21px">☐</span> | <span title="assignable peripheral" style="font-size:21px">☐</span> | Assignment (single choice) |- </onlyinclude> |} ==How to go further== ==References== <references/> <noinclude> {{ArticleBasedOnModel | Internal peripheral article model}} [[Category:Mass storage peripherals]] </noinclude>
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