“U-Boot SPL: DDR interactive mode”的版本间的差异

来自百问网嵌入式Linux wiki
第38行： 第38行：
 
=== commands available ===
 
=== commands available ===
 
使用：
 
使用：
−
* <{{Highlight|type}}> = ctl, phy (for all DDR controller or PHY registers)<br/>or one category: static, timing, map, perf, cal, dyn
+
* <{{Highlight|type}}> = ctl, phy (适用于所有DDR控制器或PHY寄存器)<br/>or one category: static, timing, map, perf, cal, dyn
 
* <{{Highlight|reg}}> = name of the register (dx0dqstr for example)
 
* <{{Highlight|reg}}> = name of the register (dx0dqstr for example)
  
 
您可以执行以下命令：
 
您可以执行以下命令：
−
* help: displays help
+
* help: 显示帮助
−
* info: manages the DDR information (step, name, size and speed)
+
* info: 管理DDR信息 (step, name, size and speed)
−
** info: displays the DDR information
+
** info: 显示DDR信息
−
** info <param> <val>: changes the <param> with <value> (<param> = "step", "name", "size" or "speed")
+
** info <param> <val>: 将 <param> 更改为 <value> (<param> = "step", "name", "size" or "speed")
−
* freq:  manages the DDR PHY frequency
+
* freq:  管理DDR PHY频率
−
** freq: displays the DDR frequency
+
** freq: 显示DDR频率
−
** freq <frequency>: changes the frequency (in kHz), allowed only in step 0
+
** freq <frequency>: 更改频率(以kHz为单位)，仅允许在步骤0中使用
 
   DDR>freq
 
   DDR>freq
 
   DDRPHY = 40000 kHz
 
   DDRPHY = 40000 kHz
 
   DDR> freq 523000
 
   DDR> freq 523000
 
   DDRPHY = 522999 kHz
 
   DDRPHY = 522999 kHz
−
* param: manages the input parameters (read from the device tree)
+
* param: 管理输入参数（从设备树中读取
−
** param [{{Highlight|type}}|{{Highlight|reg}}]: prints input parameters
+
** param [{{Highlight|type}}|{{Highlight|reg}}]: 打印输入参数
−
** param <{{Highlight|reg>}} <val>: edits parameters in step 0
+
** param <{{Highlight|reg>}} <val>: 在步骤0中编辑参数
−
* print [{{Highlight|type}}|{{Highlight|reg}}]: dump register
+
* print [{{Highlight|type}}|{{Highlight|reg}}]: 转储寄存器
−
* edit: modifies register in the DDR controller and DDR PHY<br/>need to be done at the correct step, AFTER the initialization from the input parameters (values from device tree )
+
* edit:修改DDR控制器和DDR PHY中的寄存器<br/>在输入参数初始化之后，需要在正确的步骤中完成(设备树中的值)
−
::* {{Highlight|step 1}} => CTRL register update allowed
+
::* {{Highlight|step 1}} => CTRL 允许更新寄存器
−
::* {{Highlight|step 2}} => PHY register update allowed
+
::* {{Highlight|step 2}} => PHY 允许更新寄存器
−
::* {{Highlight|step 3}} => DDR ready (only for dynamic register for controller and PHY)
+
::* {{Highlight|step 3}} => DDR 就绪（仅用于控制器和PHY的动态寄存器）
−
** edit [{{Highlight|type}}|{{Highlight|reg}}]: modifies value register in DDR controller or PHY
+
** edit [{{Highlight|type}}|{{Highlight|reg}}]: 修改DDR控制器或PHY中的值寄存器
−
* step: manages the step
+
* step: 管理步骤
−
** step: lists the available steps
+
** step: 列出可用步骤
−
** step [n]: goes to the step <n> <br/>you can reset and restart init sequence with "step 0"
+
** step [n]: 转到步骤 <n> <br/>您可以使用“步骤0”重置并重新启动初始化序列
 
   0:DDR_RESET
 
   0:DDR_RESET
 
   1:DDR_CTRL_INIT_DONE
 
   1:DDR_CTRL_INIT_DONE
第70行： 第70行：
 
   3:DDR_READY
 
   3:DDR_READY
 
   4:RUN
 
   4:RUN
−
* next: goes to the next step
+
* next: 转到下一步
−
* go: continues the U-Boot SPL execution (load u-boot, same than "step 4")
+
* go: 继续执行U-Boot SPL（加载u-boot，与“步骤4”相同）
−
* reset: reboots the machine
+
* reset: 重新启动机器
−
* test: test management : see [[#DDR test|next chapter]]
+
* test: 测试管理 : 请参阅 [q[#DDR test|next chapter]]
−
* tuning: executes the tuning command, today only one sub command
+
* tuning: 执行调整命令，现在只有一个子命令
−
** tuning <n>: executing tuning procedure <n>
+
** tuning <n>: 执行调整程序 <n>
−
** tuning help: displays the help message, lists available tuning procedures
+
** tuning help: 显示帮助消息，列出可用的优化过程
 
   0:Read DQS gating:software read DQS Gating
 
   0:Read DQS gating:software read DQS Gating
 
   1:Bit de-skew:
 
   1:Bit de-skew:
第83行： 第83行：
 
   4:Bist config:[nbErr] [seed]
 
   4:Bist config:[nbErr] [seed]
  
−
The "param" command is a simple way to test the modified settings, as it modifies the input parameters ({{Highlight| 'param'}} read from the device tree). It is recommanded to execute this command at {{Highlight|step 0}}. The modified values are applied at the correct [[#DDR steps]].
+
"param" 命令是测试修改后的设置的一种简单方法，因为它修改了输入参数 ({{Highlight| 'param'}} 从设备树中读取). 建议在 {{Highlight|step 0}}处执行此命令。修改后的值将以正确的 [[#DDR steps]]应用。
  
−
The "print" and "edit" commands directly access the CTRL and PHY registers, so the values can be overidden by the input parameters when the driver executes the intialization steps. These commands are used for detailed debug of the DDR initialization.
+
“打印”和“编辑”命令直接访问CTRL和PHY寄存器，因此当驱动程序执行初始化步骤时，输入参数可以覆盖这些值。这些命令用于DDR初始化的详细调试。
  
 
=== Examples ===
 
=== Examples ===

2020年11月3日 (二) 15:53的版本

在U-Boot中, U-Boot SPL可以提供用于DDR配置的调试控制台。

它是STM32CubeMX DDR tuning tools使用的嵌入式部件。

DDR interactive mode

此模式在编译标志 CONFIG_STM32MP1_DDR_INTERACTIVE下定义。

当这个配置标志被激活时，有两种方式进入交互模式:

  1. 在控制台中加载SPL并按下字符 ‘d’ (适用于DDR)。
    轮询只在启动序列的200毫秒内完成。
    因此手动操作很困难，您应该在SPL启动期间一直按“d”键，直到DDR> 提示符出现。
  2. 通过在make选项中添加 DDR_INTERACTIVE=1 编译为强制DDR_INTERACTIVE模式
    然后，SPL自动进入DDR模式：
  PC $> DEVICE_TREE=<device tree name> DDR_INTERACTIVE=1 make

当DDR工具控制台可用时，在SPL信息标语之后显示以下输出： 

  0:DDR_RESET
  DDR>

交互模式使用与SPL控制台相同的UART，默认情况下，STMicroelectronics板使用UART4，且Bps = 115200 Bit = 8 Parity = None Stop = 1

DDR steps

DDR交互模式使用5个步骤来初始化DDR控制器和PHY（包括初始化期间发送给DDR的“模式寄存器” 0-3），并使用在设备树中找到的参数：

step name Description DDR CTL
state		 DDR PHY
state		 DDR CTL
registers		 DDR PHY
registers
0 DDR_RESET Initial state
Clock initialized
'param' initialized with Device Tree		 Reset Reset Reset Values Reset Values
1 DDR_CTRL_INIT_DONE Controller init done Clocked Reset Init done with 'param.ctl'
CTL register can be updated (command edit)		 Reset Values
2 DDR PHY_INIT_DONE DDR PHY init done Runnig
Waiting PHY		 Clocked - Init done with 'param.phy'
PHY register can be updated (command edit)
3 DDR_READY DDR ready and ports are open
test can be executed		 Running Running - -
4 RUN Continue execution (U-Boot load) Running Running - -

commands available

使用：

  • <type> = ctl, phy (适用于所有DDR控制器或PHY寄存器)
    or one category: static, timing, map, perf, cal, dyn
  • <reg> = name of the register (dx0dqstr for example)

您可以执行以下命令：

  • help: 显示帮助
  • info: 管理DDR信息 (step, name, size and speed)
    • info: 显示DDR信息
    • info <param> <val>: 将 <param> 更改为 <value> (<param> = "step", "name", "size" or "speed")
  • freq: 管理DDR PHY频率
    • freq: 显示DDR频率
    • freq <frequency>: 更改频率(以kHz为单位)，仅允许在步骤0中使用
 DDR>freq
 DDRPHY = 40000 kHz
 DDR> freq 523000
 DDRPHY = 522999 kHz
  • param: 管理输入参数（从设备树中读取
    • param [type|reg]: 打印输入参数
    • param <reg> <val>: 在步骤0中编辑参数
  • print [type|reg]: 转储寄存器
  • edit:修改DDR控制器和DDR PHY中的寄存器
    在输入参数初始化之后，需要在正确的步骤中完成(设备树中的值)
  • step 1 => CTRL 允许更新寄存器
  • step 2 => PHY 允许更新寄存器
  • step 3 => DDR 就绪（仅用于控制器和PHY的动态寄存器）
    • edit [type|reg]: 修改DDR控制器或PHY中的值寄存器
  • step: 管理步骤
    • step: 列出可用步骤
    • step [n]: 转到步骤 <n>
      您可以使用“步骤0”重置并重新启动初始化序列
 0:DDR_RESET
 1:DDR_CTRL_INIT_DONE
 2:DDR PHY_INIT_DONE
 3:DDR_READY
 4:RUN
  • next: 转到下一步
  • go: 继续执行U-Boot SPL（加载u-boot，与“步骤4”相同）
  • reset: 重新启动机器
  • test: 测试管理 : 请参阅 [q[#DDR test|next chapter]]
  • tuning: 执行调整命令，现在只有一个子命令
    • tuning <n>: 执行调整程序 <n>
    • tuning help: 显示帮助消息，列出可用的优化过程
 0:Read DQS gating:software read DQS Gating
 1:Bit de-skew:
 2:Eye Training:or DQS training
 3:Display registers:
 4:Bist config:[nbErr] [seed]

"param" 命令是测试修改后的设置的一种简单方法，因为它修改了输入参数 ( 'param' 从设备树中读取). 建议在 step 0处执行此命令。修改后的值将以正确的 #DDR steps应用。

“打印”和“编辑”命令直接访问CTRL和PHY寄存器，因此当驱动程序执行初始化步骤时，输入参数可以覆盖这些值。这些命令用于DDR初始化的详细调试。

Examples

 DDR>info
 step = 3 : DDR_READY
 name = DDR3-1066/888 bin G 2x4Gb 533MHz v1.40
 size = 0x40000000
 speed = 533000 kHz

 DDR>param cal
 ==phy.cal==
 dx0dllcr= 0x40000000
 dx0dqtr= 0xffffffff
 dx0dqstr= 0x3db02000
 dx1dllcr= 0x40000000
 dx1dqtr= 0xffffffff
 dx1dqstr= 0x3db02000
 dx2dllcr= 0x40000000
 dx2dqtr= 0xffffffff
 dx2dqstr= 0x3db02000
 dx3dllcr= 0x40000000
 dx3dqtr= 0xffffffff
 dx3dqstr= 0x3db02000

 DDR>print dx0dqstr
 dx0dqstr= 0x3db03001

 DDR>print mstr
 mstr= 0x00040401

DDR test

To execute the DDR test you need to be in the 'DDR ready' step (step 3).

To generate the list of tests, execute the 'test' command without any parameters: 

 DDR>step 3

 DDR>test
 test:25
 0:All:
 1:Simple DataBus:[addr]
 2:DataBusWalking0:[loop] [addr]
 3:DataBusWalking1:[loop] [addr]
 4:AddressBus:[size] [addr]
 5:MemDevice:[size] [addr]
 6:SimultaneousSwitchingOutput:[size] [addr] 
 7:Noise:[pattern] [addr]
 8:NoiseBurst:[size] [pattern] [addr]
 9:Random:[size] [loop] [addr]
 10:FrequencySelectivePattern :[size]
 11:BlockSequential:[size]
 12:Checkerboard:[size]
 13:BitSpread:[size]
 14:BitFlip:[size]
 15:WalkingOnes:[size]
 16:WalkingZeroes:[size]
 17:infinite read:[addr]
 18:infinite write:[addr]

Each test can be executed individually, and is identified by its number: 

 DDR>test 1
 execute 1:Simple DataBus
 Result: Pass [address 0xc0000000]

All tests can be executed with test 0: 

 DDR>test 0
 execute 0:All
 execute 1:Simple DataBus
 result 1:Simple DataBus = Passed
 
 execute 2:DataBusWalking0
 running 100 loops at 0xc0000000
 result 2:DataBusWalking0 = Passed
 
 execute 3:DataBusWalking1
 running 100 loops at 0xc0000000
 result 3:DataBusWalking1 = Passed
 ....
 check buffer.
 pattern = 00000001.
 check buffer.
 result 15:WalkingOnes = Passed
 
 Result: Pass [0/16 test failed]

Source code organization

These files provide a list of defines: 

  #define DDR_<NAME>   <VALUE>

and include |}} stm32mp15-ddr.dtsi to provide each register value for the DDR controller and PHY.

These DDR files are included in the board files stm32mp157c_<board>-uboot.dts needed to build the device tree with the required DDR configuration nodes.

Load the SPL into embedded RAM

To execute the SPL in DDR interactive mode, and to tune the DDR settings, the SPL needs to be loaded into embedded RAM:

with STM32CubeProgrammer

You can use the CLI command to directly load the SPL into the embedded RAM for peripheral boot on USB or UART.

In this case the load with STM32Programmer needs to be repeated after each reset.

Warning.png The manual connection is difficult in parallel of STM32Programmer: it is recommended to activate the compilation flag DDR_INTERACTIVE to force the interactive mode.

The next example uses the Linux cli, but you can also use ST32CubeProgrammer for Windows (.bat file) with the same parameters.

USB

 PC $> STM32_Programmer.sh -c port=usb1 -w spl/u-boot-spl.stm32 0x01 --start 0x01

UART

 PC $> STM32_Programmer.sh -c port=/dev/ttyS0 br=115200 -w spl/u-boot-spl.stm32 0x01 --start 0x01

with GDB

 (gdb) file u-boot-spl.elf
 (gdb) load
 (gdb) set $dtb =  __bss_end
 (gdb) restore spl/u-boot-spl.dtb binary $dtb

Warning: SPL DTB is not included in the ELF file by default; you need to load it manually with GDB at the correct location.

Boot from SD card

You can directly update SPL on the SD card used, and let the Boot ROM code load the binary for the next boot form SD card.

In this case, activate the DDR mode by pressing the 'd' key continously (DDR_INTERACTIVE=1 is not mandatory).

Writing the SPL to SDMMC on Linux PC

See 如何在SD卡上更新U-Boot to update partition 1 and 2 with partition <n> = /dev/mmcblk0p<n> or /dev/sdb<n> : 

 PC $> dd if=u-boot-spl.stm32 of=<dev>1 conv=fdatasync
 PC $> dd if=u-boot-spl.stm32 of=<dev>2 conv=fdatasync

Writing SPL in SDMMC with STM32CubeProgrammer

Warning: STM32CubeProgrammer uses the DDR for U-Boot execution, so this method cannot be used during debug of the DDR settings and execution of the unitary (DDR) test..

To boot from SDCARD, the generated files must be written in 2 partitions :

  • 1: spl/u-boot-spl.stm32
  • 4: u-boot.img

The Linux command is: 

 PC $> STM32_Programmer.sh -c port=usb1  -w FlashLayout.tsv

With FlashLayout.tsv following STM32CubeProgrammer_flashlayout format, for example: 

#Option	Id	Name	Type	Device	Offset		Binary
P	0x01	fsbl1	Binary	SDMMC1	0x00004400	spl/u-boot-spl.stm32
PE	0x02	fsbl2	Binary	SDMMC1	0x00044400	none
P	0x03	ssbl	Binary	SDMMC1	0x00084400	u-boot.img.bin

You can also use programmer for Windows (.bat file) with the same parameters.

取自“http://wiki.100ask.org/index.php?title=U-Boot_SPL:_DDR_interactive_mode&oldid=7329”