RTC internal peripheral

Article purpose

The purpose of this article is to

• briefly introduce the RTC peripheral and its main features
• indicate the level of security supported by this hardware block
• explain how it can be allocated to the three runtime contexts and linked to the corresponding software components
• explain, when needed, how to configure the RTC peripheral.

Peripheral overview

The RTC peripheral is used to provide the date and clock to the application. It supports programmable alarms and wake up capabilities.

Features

Refer to STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to know which features are really implemented.

Security support

The RTC peripheral is a secure peripheral.

Peripheral usage and associated software

Boot time

By default after a backup domain power-on reset (performed at boot time), all RTC registers can be read or written in both secure and non-secure modes.
In OpenSTLinux distribution, the first stage bootloader (FSBL, running in secure mode) keeps this default configuration, leaving full control to Linux^® at runtime. <securetransclude src="ProtectedTemplate:InternalInfo" params="This configuration could be changed in RTC_SMCR register, per sub function (initialization, calibration, alarm A, alarm B, wake up timer and time-stamp). The customer may adapt this configuration to his needs, sharing some functions with the coprocessor or the secure world. This would require some code adaptation because, in case some functions are put in secure world, then secure services are needed to access to some control registers (like the write protection) from Linux."></securetransclude> The RTC peripheral is able to generate two interrupts:

• A secure interrupt, connected to the Arm^® Cortex^®-A7 GIC, not used in OpenSTLinux distribution.
• A non-secure interrupt, connected both to Arm^® Cortex^®-A7 GIC and Cortex-M4 NVIC: this interrupt is used on Linux^® and by default in OpenSTLinux distribution.
  

The RTC peripheral is part of the backup domain which reset and clock are controlled via the RCC by the first stage bootloader (FSBL, running in secure mode) at boot time.
The RTC reset occurs when the backup domain is reset. To avoid clearing the TAMP register contents, this is only done on cold boot, not on wake up.

Runtime

Overview

The RTC peripheral can be allocated to the Arm^® Cortex^®-A7 non-secure core to be used under Linux^® with RTC framework.

Software frameworks

Domain	Peripheral	Software frameworks			Comment
		Cortex-A7 secure (OP-TEE)	Cortex-A7 non-secure (Linux)	Cortex-M4 (STM32Cube)
Core	RTC		Linux RTC framework

Peripheral configuration

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via STM32CubeMX tool for all internal peripherals, and then manually completed (especially for external peripherals) according to the information given in the corresponding software framework article.

For Linux kernel configuration, please refer to RTC device tree configuration.

Peripheral assignment

Internal peripherals assignment table template

| rowspan="1" | Core
| rowspan="1" | RTC
| RTC
| ✓
| ✓
|
| RTC is mandatory to resynchronize  STGEN after exiting  low-power modes.
|-

|}

<securetransclude src="ProtectedTemplate:PublicationRequestId" params="10398 | 2019-01-21 | AnneJ"></securetransclude> <securetransclude src="ProtectedTemplate:ArticleBasedOnModel" params="Internal peripheral article model"></securetransclude>